This article delves into the core challenges and solutions faced in designing high-performance circuit boards for AI applications. It details how to ensure the integrity of extremely high-speed signals during transmission, manage the enormous power consumption and heat generated by the astonishing computing power, and achieve high-density integration within limited space. This article provides key technical guidance for building stable and reliable AI hardware systems.
In this article:
Part 1. High-speed Signal Transmission Part 2. High Power Consumption and Heat Dissipation Part 3. Implementation Requirements for High-density Integration Part 4. Power IntegrityHigh-speed Signal Transmission
When designing circuit boards for AI applications, high-speed signal transmission is a primary challenge. AI processors exchange vast amounts of data between each other and between processors and high-bandwidth memory, with signal rates typically reaching tens of Gbps and even approaching 112 Gbps. At these extremely high frequencies, traditional PCB materials exhibit significant signal loss, leading to waveform distortion and bit errors. Therefore, it is crucial to select high-end substrate materials with low dielectric constants and low dissipation factors, such as Rogers' Megtron series, Panasonic's PPE substrate, or liquid crystal polymers. These materials effectively minimize signal energy attenuation during transmission.
Furthermore, precise impedance control of high-speed signal lines is crucial. Maintaining consistent characteristic impedance from the transmitter to the receiver is crucial to avoid signal reflections caused by impedance discontinuities. Furthermore, for high-speed signals passing through through-holes, excessively long stubs can become obstacles in the signal path. Backdrilling is essential to remove these unused metal studs to ensure a clean and unobstructed signal path.
High Power Consumption and Heat Dissipation
The incredible computing power of AI chips comes with extremely high power consumption, with some accelerator cards exceeding kilowatts. This makes thermal management crucial to system stability. If heat can't be dissipated quickly, the chip will overheat, throttling, or even damage, leading to system failure. To address this challenge, the circuit board itself needs to serve as a heat sink. Using thick copper in the power transmission path is an effective approach. Thicker copper layers can carry greater current and facilitate heat conduction through their flat surfaces.
For localized hot spots, a metal-core PCB can be used. This involves laminating a metal plate beneath an insulating layer to rapidly conduct heat laterally. For more demanding scenarios, ceramic substrates with excellent thermal conductivity can even be considered.
An even more advanced design approach is to embed heat dissipation structures directly into the circuit board. For example, tiny cooling channels can be created in the PCB layer directly below the chip, allowing coolant to flow directly over the heat source, achieving efficient heat exchange and ensuring that the AI chip can continuously operate at peak performance.
Implementation Requirements for High-density Integration
AI hardware strives to achieve the highest computing power within the smallest physical space, requiring circuit boards to support extremely high-density component interconnects. Traditional through-hole (THV) technology, due to its large pads and apertures, is no longer able to meet the routing and density requirements of modern AI acceleration modules. This necessitates the use of any-layer high-density interconnect technology. This means that micro blind vias (BMVs) can be used to connect between all conductive layers of the PCB, providing the shortest and most flexible signal routing paths. Substrate-like technology further reduces line widths and spacing to levels approaching those of the chip substrate, enabling dense fan-out capabilities for the ball grid array (BGA) underneath the chip.
At a system level, advanced packaging technologies such as CoWoS (CoWoS) integrate the processor die and high-bandwidth memory silicon interposer into a single package. The underlying ABF substrate itself is an extremely precise miniature circuit board, significantly reducing wiring pressure at the motherboard level. Looking ahead, co-packaged optical technology will mount the optical engine directly on the PCB or near the switch chip, replacing some high-speed electrical signals with optical signals. This fundamentally addresses the interconnect density and power consumption issues associated with high bandwidth.
Power Integrity
AI chips operate in highly dynamic states, switching from low-power to full-load computing within nanoseconds, generating enormous transient currents. These dramatic current fluctuations can induce significant voltage noise in the parasitic inductance and resistance of the power distribution network. If the supply voltage fluctuations exceed the chip's tolerance, this can lead to logic errors or decreased computing performance.
Therefore, building a low-impedance, high-performance power distribution network is a top priority. This requires carefully designed layered power and ground planes to provide a low-inductance return path, and a large number of decoupling capacitors of varying types and values deployed around the chip's power input pins to form a coordinated decoupling system from low to high frequencies. These capacitors can quickly respond to the chip's current demands locally, compensating for any shortcomings in the power module's response speed. This ensures that the supply voltage remains within a tight tolerance, providing a continuous and pure source of energy for the AI chip's stable operation.
In short, designing circuit boards for AI is a complex challenge involving materials science, thermodynamics, and electrical engineering. The key to success lies in the collaborative design of high-speed signal transmission, robust power distribution, and efficient thermal management as a holistic system. Only through this holistic design philosophy can we create a solid foundation for the next generation of AI chips that can fully unleash their immense computing power, thereby driving the continued advancement of the entire AI industry.
One-Stop HDI PCB Manufacturer and Its PCB Via Filing Capabilities
If you're looking for turnkey HDI electronics manufacturing services (EMS) from hardware development to PCBA fabrication and box-build assembly, you can work with the one-stop HDI PCBA manufacturer PCBONLINE.
Founded in 1999, PCBONLINE has R&D capabilities for HDI projects and EMS manufacturing capabilities, including via filling for stacked vias. It provides 4-to-64-layer HDI PCB fabrication, assembly, and PCBA box-build assembly. You can order various HDI PCBs from PCBONLINE, such as FR4, polyimide (flexible PCB), polyimide + FR4 (rigid-flex PCB), and PTFE/Rogers (high-frequency PCB).
3000m² of production capacity per day for HDI PCBs with builds of 1+N+1, 2+N+2, 3+N+3,4+N+4, and arbitrary interconnection in any layers.
PCBONLINE has hardware and software R&D capabilities for IoT applications requiring HDI design, including PCBA and enclosures.
We can manufacture complex PCBs with stacker vias, via-in-pad, microvias, inlay boards, heavy copper designs, and hybrid and fine structure lay-ups.
Besides HDI PCB fabrication, we have powerful capabilities in fine-pitch assembly for HDI PCB assembly.
We have rich R&D and manufacturing experience for HDI applications such as FPGA boards.
High-quality HDI PCB and PCBA manufacturing certified with ISO 9001:2015, IATF 16949, RoHS, REACH, UL, and IPC-A-610 Class 2/3.
Here'e the PCB via filing capabilities at PCBONLINEL:
- Micriavia filling with copper: laser via size 0.1-0.125mm, priority 0.1mm
- Finished hole size for via-in-pad filling with resin: 0.1-0.9mm (drill size 0.15-1.0mm), 0.3-0.55mm normal (drill size 0.4-0.65mm)
- Max aspect ratio for via-in-pad filling with resin PCB - 12: 1
- Min resin plugged PCB thickness: 0.2mm
- Max via-filling ith resin PCB thickness: 3.2mm
- Making different hole sizes with via filling in one board: Yes
- Via filling with copper/silver: Yes
If you need HDI PCBAs or any other PCBAs requiring via filling, please send your email to PCBONLINE at info@pcbonline.com. We will provide one-on-one engineering support to you.
Conclusion
Via filling is used for creating stacked vias in HDI PCB fabrication, BGA/CSP/QFN IC packaging, and filling PCB via-in-pad with resin during multilayer PCB fabrication. If you need one-stop electronics manufacturing for your HDI PCBA project, contact the one-stop advanced PCB manufacturer PCBONLINE for high-quality PCBA and box-build solutions tailored to your project's needs.
PCB fabrication at PCBONLINE.pdf
